Real-time reconstruction of tracks at LHCb with FPGAs
by
Michael Joseph Morello(Scuola Normale Superiore and INFN Sezione of Pisa)
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Europe/London
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https://ukri.zoom.us/j/92821676530
Description
The LHCb experiment is undergoing a major upgrade in view of the LHC Run-3 and Run-4, in which the complete detector will be read out, and events fully reconstructed, at the LHC crossing rate of 30 MHz on average. Two of the key steps of the event reconstruction are finding tracks in the new, high precision pixel vertex detector (VELO), and finding standalone tracks downstream of the magnet in the new forward tracking detector (Scintillating Fibre Tracker). The first step is the necessary starting point for most of the rest of the reconstruction, and requires about half the total CPU time that will be available in the upgraded Event Filter Farm. Finding standalone tracks downstream of the magnet at the earliest trigger level, instead, is not yet part of the baseline plan, on account of the significant CPU time required to execute this search. This limits the reconstruction efficiency of many long-lived particles, such as Kshort and strange baryons decaying outside the acceptance of the VELO. I present here the current status of a LHCb R&D project, the so-called RETINA project, devoted to accelerating these computations by the use of an array of commercial state-of-the-art FPGA cards embedded in the DAQ system, performing pattern recognition 'on the fly', while the detector is being readout at 30 MHz.
